1. Field of the Invention
The present invention relates to superconductive switching devices, and in particular to a superconducting crossbar switch for bidirectionally connecting a plurality of inputs with a plurality of outputs.
2. Background of the Technology
Advances in high performance computing are being pursued in many different directions. The technology thrust has been directed toward very high speed, high circuit density chips which are of low power (to permit small volume packaging) and organized into a small number of processors. Another thrust involves the use of many processors, tens to perhaps thousands, working in concert to perform the computation. In this case, the stress on the individual elements is relieved and there is greater computational power, but interconnection problems that arise with the added software complexity must be solved.
One of the configurations for a massively parallel computing system calls for a large number of processors to be connected to a large shared memory system on an equal access basis. The demands placed upon the interconnection switch are formidable, in terms of complexity, speed, and intelligence. For example, the switch must have a short latency time and must establish the requested connection very quickly, ideally within a small fraction of the processor clock time. The data rate per channel must also be very high. For example, for a 32 bit word machine with a 30 nanosecond clock, a data rate of 109 bits/second (i.e., gigabits/second) per processor is required. Once established, the data path must be immune to noise, and crosstalk must be kept to a minimum. The established link must be inviolate during the processor transaction time and releasable very quickly, ideally within a clock cycle.
There is a need to inform the processor of successful connection. The time during which two or more processors contend for the same memory port needs to be minimized with fast resolution of these contentions. Finally, data needs to be transferred in both directions. Although there are a number of switch architecture solutions, it is generally accepted that the best solution is a crossbar, which is a switch that allows the requesters equal access at the same level to any output line.
Computer systems also need high bandwidth and short access times to carry out data exchange between memory and processors, and among processors.
3. Related Art
Crossbar switches are well-known in the prior art, as evidenced by U.S. Pat. No. 3,539,730 to Imamura, which discloses a crossbar switch used in a two-stage link connection system. Each switch is divided into two parts, in accordance with vertical groups. The parts of the switch are assigned to primary and secondary lattices, respectively, with links between the lattices being formed by connecting the outgoing lines from the primary lattice of one switch with the secondary lattice of another switch.
Also known in the art are polarity switching circuits which utilize Josephson junction devices (e.g., interferometers) and superconducting interconnections coupled to a utilization circuit, including one or more memory cells or logic circuits. Such circuits are disclosed, for example, in U.S. Pat. No. 4,210,921 to Faris.
Prior switching circuits possess certain inherent drawbacks that render them unsuitable for use with large numbers of computing elements. As a result, they cannot meet all of the requirements set forth above for a massively parallel computing system.